3311_2ini.zip
2002-12-06 by diegochavezcarro
In the archive M68331_332TUT.pdf it appears the following: The software examples included in the tutorial and a sample system schematic are available through
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RE: [68300] QADC sub-system of the 68376, sample code
2002-12-01 by Dees Randy-rsaf30
see AN1776, AN1798, and AN1791. AN1791 may be hard to find and really talks about the slightly enhanced version of the qadc, the qadc64... go the Motorola
QADC sub-system of the 68376, sample code
2002-11-30 by robotmaster2100
Hello everyone, I m a new member to the group. I m looking for sample code to get started with my 68376 QADC and CAN sub-systems. Can anyone direct me to a
PMA function
2002-11-25 by Roy
Can anybody find anything wrong with the following. Having read & re read the motorola literature & the TPU microcode for the PMA function I now have some
RE: [68300] TPU debugging
2002-11-19 by Scott Newell
... You already have--the docs arrived yesterday! newell
Re: [68300] Tabel Stepper Motor TPU Problems
2002-11-19 by Robert Yablonski
Jeff, I do not know if the TSM is causing problems but stepper motors are very fickle unless put into a closed loop system. You can easily get the problems
RE: [68300] TPU debugging
2002-11-19 by Melear Charles-rdph40
Scott, I have used the free debugger and it is OK. It is not the last word in debuggers but it is free and it is better than what you have now. (Because you
RE: [68300] Tabel Stepper Motor TPU Problems
2002-11-19 by Melear Charles-rdph40
Jeffery, I really don t have a clue but for people who write in C, the get caught by a particular problem with how C treats the Host Service Request Register.
Re: [68300] TPU debugging
2002-11-19 by Scott Newell
... My understand (still untested) is that you have to take TSC low _and_ flip some register bits to get into test mode, at least on the 332. ... The original
Re: TPU debugging
2002-11-19 by morbacharno
... Hi, when I wrote a TPU function I also didn´t get the debugging mode running. I used a very slow TPU clock and monitored the parameter RAM of the TPU with
TPU debugging
2002-11-19 by Roy
Hi all I am still being given lots of grief by the TPU and am now looking at TPU debuggers, and noticed that John Honold talked of puting the 332 into a test
Tabel Stepper Motor TPU Problems
2002-11-19 by jeffreyslcu
Hi all, I am using the Table Stepper Motor (TSM) function in the TPU to, well, run a stepper motor. I am having two problems that I am hoping someone can help
RE: [68300] Where's TSTME?
2002-11-18 by Honnold John-r37277
Scott: The TSC and the TSTME signal do share the same pin, pin 57 on the 132 pin package and pin 80 on the 144 pin package. If you want to have the 332
Where's TSTME?
2002-11-18 by Scott Newell
Been reading up on TPU stuff, and if I want to attempt to use some of the more esoteric TPU development features (single step, breakpoints, etc.), it appears
Re: [68300] Two Flash chips
2002-11-14 by Dr. David A. Perreault
Robert The programming algorithms from P&Em in, most cases, are configured for CSBOOT. If it is the same type of flash, you can make a renamed copy of the
Re: [68300] Two Flash chips
2002-11-14 by Andrei Chichak
If PROG32 is anything like PROG32S (I hope it s better, much better), you will have to program CSBAR8 and CSOR8 before you can access the second flash set on
Two Flash chips
2002-11-14 by Robert Yablonski
Group, I have a 68332 on which I have two flash chips. The first is use for boot. It resides at address 0 and is chip selected by CSboot. The second resides
RE: [68300] Re: TPU
2002-11-14 by Melear Charles-rdph40
Robert, I read your message and I guess I was in a big hurry and I read SASE/mailing as SCSI/mailing . I thought like what the hey does a SCSI port have to
Re: [68300] Re: TPU
2002-11-14 by Robert Layton
Charles, I would also like to have a look at the manuals as I am just about to join in the TPU microprogramming game after using the built in functions for a
RE: [68300] Re: TPU
2002-11-14 by Melear Charles-rdph40
OK Folks, I know this guy. He is not the brighest thing in the world but from what I understand this guy has the documentation on programming the TPU
Re: [68300] Re: TPU
2002-11-14 by Roy
Hi Arno I will certainly agree that the TPU is a very complicated beast and is giving me some serious problems. I have a TPU manual but it does not cover the
Re: TPU
2002-11-13 by morbacharno
... ERT is temporary event register MRL is match recognition latch TDL is transition detection latch But if you dont have the old TPU manual this will be of
TPU
2002-11-13 by Roy
Hi all Still having major issues with getting my TPU module to life but am starting again. It s like a Rubiks cube and gives us all hours of frustration.
RE: [68300] 3.3V 68LK332 reset problems
2002-11-02 by Allen Nance
Charlie: Thank-you very much for the prompt reply. To make a long story short, you were exactly right. I starting thinking along those lines as I was dropping
RE: [68300] 3.3V 68LK332 reset problems
2002-11-01 by Melear Charles-rdph40
Allan, What are you doing to my parts??????? OK, for starters, you state that you are using a 40 KHz drystal. That should give you a clock out frequency of
3.3V 68LK332 reset problems
2002-10-31 by Allen Nance
Hello Group: I have a new design with the 3.3V 68LK332 part. I have not used the 3.3V part before but have used the 68332 extensively. The problems I am having
Re: [68300] Setup for 8 bit devices
2002-10-25 by Andrei Chichak
Got it, After a very entertaining and productive phone call from Charlie, we tracked it to a output enable line that was connected to the wrong pin. A little
Re: [68300] Setup for 8 bit devices
2002-10-25 by jeffrey.tenney@gm.com
Andrei, Your settings look right. Double check your CSOR[n] MODE bit, your STRB bit, and your DSACK field. You could be having a problem with the CS
Setup for 8 bit devices
2002-10-25 by Andrei Chichak
Hi there, In 332tut.pdf there is a description of how to interface to 8 bit devices on a 332. The trick being to have the data show up on the high data bus
(no subject)
2002-10-22 by Russell Fowler
Greetings I have dabbled a little with the 68360 and written some code for it. I have however only scratched its surface, I am hopeful that you guys would
RE: [68300] QSPI - Can it do this?
2002-10-11 by Robert Manktelow
Hello All Thanks you all very much for your replies. I have implemented your suggestions and now have bi-directional SPI communications - yes! The key part of
RE: QSPI - Can it do this?
2002-10-10 by Dimiter Popoff
I have used SPI for bidirectional communications in a single master/ multiple slaves configuration. The master polls the slaves, the communication using 7-bits
RE: [68300] QSPI - Can it do this?
2002-10-10 by Melear Charles-rdph40
Robert, I think from reading the prior emails, you probably understand that the SPI master DOES NOT KNOW when the slave has data ready. You have to make up
RE: [68300] QSPI - Can it do this?
2002-10-10 by Melear Charles-rdph40
Hello everyone, I think that there may be some confusion about the SPI protocol. The master / slave relationship is fairly well described in the previous
Re: [68300] QSPI - Can it do this?
2002-10-10 by Andrei Chichak
... As the data is being clocked out of the CPU32, the data from the slave is being clocked in to the CPU32. They happen at the same time. ... You have to
Re: [68300] QSPI - Can it do this?
2002-10-10 by jeffrey.tenney@gm.com
Robert, Your understanding of the master/slave relationship is correct. The master always generates the clock and the CS during any transaction. Transactions
QSPI - Can it do this?
2002-10-10 by Robert Manktelow
Hello All This is a general question about SPI operation, and QSPI on the CPU32 in particular. The Set-up The CPU32 is SPI master and there is one slave. As I
RE: [68300] Chip Select Pulse Width
2002-09-26 by Honnold John-r37277
Robert: You need to add wait states. You do this by changing the DSACK field in the CSORx register for the corresponding chip select. One wait state is equal
Chip Select Pulse Width
2002-09-26 by Robert Yablonski
On the 68332, how do I change the chip select pulse width? Robert E. Yablonski
IDE interface
2002-09-26 by rfowler
Greetings Due to system constraints we have need to use the IDE interface hardware as general purpose parallel i/o. The objective is to use the IDE s 16bit
AW: [68300] 683xx address space and modes...
2002-09-23 by FALE(Leopold Faschalek)
Hi Jeff, the 68K does signed extensions of 8 and 16 bit values to full 32 bit addresses, so you are able to access the lower 32K and the upper 32K with 16 bit
Re: 683xx address space and modes...
2002-09-22 by Aaron J. Grier
... you have no excuses. :) the GNU project has a freely-available toolchain for 68000 and 68HC11/12. source and binaries are freely available for download
Re: 683xx address space and modes...
2002-09-21 by Dimiter Popoff
Jeff, ... Sounds very much so. I don t know the P&E assembler, but I have written several assemblers and one of the issues I had to face was signed versus
Re: [68300] 683xx address space and modes...
2002-09-21 by Jeff Andle
I started switching over to absolute short addressing... I am using the P&E Microsystems assembler. I am placing the SRAM at $FFFFD000, below the SCIM
Re: [68300] 683xx address space and modes...
2002-09-20 by jeffrey.tenney@gm.com
Jeff, The (d16, An) addressing mode is very efficient. However, Absolute Short [ (xxx).W ] is just as efficient on the CPU32. The instruction size is the
683xx address space and modes...
2002-09-20 by Jeff Andle
I am porting some CPU16 code in which the addressing was performed using ZK:ZX = 0 and the SCIM control registers were accessed at negative 16-bit
Re: [68300] Identifying 68F375 revision number...?
2002-09-19 by Charles Melear
Hello everyone, With regard to rev and mask numbers, the only one that really means anything is the mask number. REgards, Charlie ... From: Bob McMillan
Re: [68300] Identifying 68F375 revision number...?
2002-09-19 by Charles Melear
Jeff, The mask number is 8J28H. It is generally the line right unter the part number. Charlie ... From: Jeff Andle To: 68300@yahoogroups.com Sent: Tuesday,
RE: [68300] Identifying 68F375 revision number...?
2002-09-17 by Bob McMillan
Jeff, After searching everything available to me I believe you should submit this question directly to the Motorola Help line. This is one of the issues that
external clocks...? (and no release of reset)
2002-09-17 by Jeff Andle
I think I found the problem with my chips not coming out of reset... It appears that, while the 68F375 *can* operate at 33.56 MHz from an external clock, that